Physics-based On-chip Logic for Autonomous Radiation-Immune Systems
A Vision and Research Roadmap for Nanomagnetic Logic in Space Hardware
Nanomagnetic Logic is not a general-purpose computing replacement. It is a physically distinct computing paradigm whose intrinsic properties — non-volatile state, radiation orthogonality, cryogenic operability — map directly to a class of space computing problems that conventional rad-hard silicon cannot solve without fundamental compromise. POLARIS exists to characterise, develop, and ultimately deploy that capability.
Space is permeated by high-energy charged particles: galactic cosmic rays (protons, helium nuclei, and heavy ions accelerated to relativistic velocities by supernova remnants), solar energetic particles (bursts of protons and electrons from solar flares and coronal mass ejections), and trapped radiation in planetary magnetospheres (the Van Allen belts around Earth, intense radiation belts around Jupiter). These particles carry energies from MeV to GeV and penetrate almost all passive shielding materials at realistic spacecraft mass budgets.
When a high-energy charged particle traverses a semiconductor device, it deposits ionising energy through direct ionisation (heavy ions) or nuclear reactions (protons, neutrons). In a CMOS memory cell, this energy liberates electron-hole pairs. If the deposited charge exceeds the critical charge of the cell, the stored bit flips — this is a Single Event Upset (SEU). SEU rates in unprotected SRAM in low Earth orbit range from one error per day to one per hour depending on orbit altitude and solar activity. In the outer solar system and during solar energetic particle events, rates are orders of magnitude higher.
The space industry's response has been radiation hardening of conventional silicon. Rad-hard CMOS devices are manufactured using modified foundry processes — silicon-on-insulator (SOI) substrates, enclosed transistor layouts, guard rings, thick gate oxides — and designed with system-level redundancy: triple-modular redundancy (TMR), error-correcting codes (ECC), and memory scrubbing cycles that periodically refresh state before accumulated errors propagate.
These approaches work, but they carry fundamental costs that compound as missions become more ambitious:
| Constraint | Effect | Consequence for Deep Space Missions |
|---|---|---|
| Radiation-hardened foundry processes lag commercial nodes by 10–15 years | Processing capability is frozen at a decade-old technology node | Mars Science Laboratory's RAD750 is derived from a 1997 commercial processor. A 2026 spacecraft may fly equivalent performance. |
| Hardening processes cannot be economically applied to the most advanced nodes | Power efficiency and compute density of state-of-the-art silicon is unavailable to space designers | Edge AI, onboard science processing, and autonomous navigation are limited by available compute. |
| TMR triples the chip area and power consumption for logic | Every redundant circuit is dead mass and dead power draw on a spacecraft with strict budgets | Deeper space = smaller power budgets = harder tradeoff between reliability and capability. |
| Critical charge Q_crit decreases as process nodes shrink | Newer (smaller) nodes are intrinsically more susceptible to SEUs, not less | The industry cannot simply migrate to advanced nodes without re-hardening from scratch. |
| Physical shielding requires tantalum, polyethylene, or aluminium mass | Mass added to shield electronics costs thousands of dollars per kilogram to orbit | Deep space missions carry less shielding to save mass, accepting higher radiation exposure. |
All of these constraints have a single root cause: CMOS logic stores binary state as electrical charge. Charge is what ionising radiation disturbs. Every mitigation strategy in the radiation-hard silicon toolbox is managing the consequences of this fundamental physical coupling between the threat environment and the storage mechanism.
The question POLARIS begins from:
What if binary state were stored in a physical variable that ionising radiation does not interact with through any primary mechanism? The threat would not be mitigated — it would be irrelevant.
Magnetic orientation is that variable. A nanomagnet pointing left or right does not flip when a charged particle passes through it, because ionising radiation creates charge carriers, and charge carriers do not exert forces on magnetic dipoles through any primary interaction at the energy scales relevant to space radiation. This is the physical foundation of POLARIS.
A ferromagnetic element smaller than a critical dimension — approximately 100–300nm for Permalloy (Ni₈₀Fe₂₀) — cannot support a multi-domain magnetic state energetically. Every atomic magnetic moment within the element aligns in the same direction: the element is a single magnetic domain. For an elongated (elliptical or rectangular) element, shape anisotropy creates an easy axis along the long dimension — the magnetisation prefers to point along this axis. Two orientations are stable: pointing left (logic 0) or pointing right (logic 1). These are the two logic states.
The energy barrier separating the two states is:
This energy barrier is why NML is intrinsically non-volatile: in the absence of a field exceeding the switching threshold, the nanomagnet retains its orientation indefinitely. No power is required to maintain state.
Adjacent nanomagnets interact through their magnetic stray fields — the dipolar (magnetostatic) interaction. For two elliptical nanomagnets placed end-to-end along their easy axes, the coupling favours parallel alignment. For two nanomagnets placed side-by-side perpendicular to their easy axes, the coupling favours anti-parallel alignment. NML uses this anti-parallel (anti-ferromagnetic) side coupling: a chain of nanomagnets placed side-by-side will spontaneously adopt an alternating up-down-up-down (or left-right-left-right) ground state. A signal injected at one end of the chain propagates as alternating orientations — this is the NML wire.
Logic emerges from junction geometry. A majority gate places three input nanomagnets around a single output nanomagnet, positioned so that each input's stray field couples to the output. The output resolves to whichever orientation the majority of the three inputs demand — it takes the magnetic vote of the majority. This is the 3-input majority function: MAJ(A, B, C).
The majority gate is the universal NML primitive. From it, all Boolean logic follows:
AND(A, B) = MAJ(A, B, 0) // fix one input to logic 0
OR(A, B) = MAJ(A, B, 1) // fix one input to logic 1
NOT(A) = geometric inversion through 90° coupling angle
NAND(A, B) = NOT(AND(A, B)) = NOT(MAJ(A, B, 0))
NOR(A, B) = NOT(OR(A, B)) = NOT(MAJ(A, B, 1))
// From these five operations: any Boolean function is constructible
// Half adder, full adder, comparator, multiplexer — all constructible
Without an external mechanism, a coupled nanomagnet array simply sits in its ground state and does not compute. Computation requires a clock — a way to destabilise the system, inject new input information, and let it resolve to the output. In NML, the clock is an oscillating magnetic field applied along the hard axis (perpendicular to the easy axis). This hard-axis field temporarily lifts the nanomagnets to a metastable state. As the field ramps back down, each nanomagnet resolves to the orientation dictated by its neighbours' coupling forces. The clock field therefore controls when each magnet's state is updated, and zonal clocking — applying the hard-axis field to successive regions of a circuit at offset phases — creates pipeline-like information flow.
The magnetisation dynamics of every nanomagnet in a simulation are governed by the Landau-Lifshitz-Gilbert (LLG) equation, which MuMax3 and OOMMF both integrate numerically over a finite-difference spatial grid:
MuMax3 computes this simultaneously for every cell in the simulation grid, using a 4th-order Runge-Kutta integrator accelerated on NVIDIA GPUs.
| NML Physical Property | Space Hardware Requirement | Why It Matters |
|---|---|---|
| State stored as magnetic orientation, not charge | Immunity to Single Event Upsets (SEUs) from ionising radiation | No charge liberates no bit flip. The primary failure mechanism of rad-hard CMOS has no equivalent mechanism in NML. |
| Non-volatile — magnetic state persists without power | Reliable operation through power cycles (eclipse/sunlit transitions, fault recovery) | CMOS SRAM loses all state on power loss. NML resumes computation exactly where it stopped. |
| Operates below Curie temperature (~450°C for Permalloy) | Function at extreme temperature ranges (cryogenic and elevated) | CMOS transistor operation fails below ~-55°C. NML is physically stable from 4K to ~400°C. |
| No charge-based switching — no leakage current at rest | Ultra-low standby power for deep space probes with limited solar power | RTG-powered outer solar system probes have strict power budgets. NML's passive state retention uses zero standby power. |
| No process-hardening required — immunity is intrinsic | Access to modern geometry and density without a decade lag | Immunity derives from physics, not foundry. In principle, NML can use advanced nanofabrication without re-hardening. |
| Magnetic state survives mechanical shock and vibration | Launch environment survivability | NML state is not disrupted by the vibration and acoustic loads of launch, unlike charge-based volatile memory. |
Any serious programme must account for the fact that nanomagnetic logic research, while active from approximately 2000–2015, declined in publication volume after that period. Understanding why is essential to positioning POLARIS correctly.
Reliable room-temperature operation requires ΔE/kT > 40, which requires either large nanomagnet volumes (reducing density) or high-anisotropy materials (increasing switching field). The intersection of all constraints proved difficult to achieve simultaneously with e-beam lithography precision available in 2010–2015.
POLARIS Position: Improved lithography, VCMA clocking, and strain-mediated approaches developed post-2015 partially address this. POLARIS's simulation campaign will identify geometry and material operating points using current best-practice parameters.
STT-MRAM (spin-transfer torque magnetic RAM) and, later, SOT (spin-orbit torque) logic received more industrial investment because they are more compatible with CMOS back-end process flows and already in commercial production (MRAM is in phones and automotive MCUs).
POLARIS Position: STT-MRAM and SOT logic are excellent for terrestrial applications. They are not optimised for the specific space hardware problem POLARIS addresses. The design objective is different, not the same.
The original NML vision — a complete general-purpose processor competitive with CMOS — is not viable. NML is too slow for general-purpose computing and the density required for a full CPU is beyond current fabrication capability.
POLARIS Position: POLARIS does not target a general-purpose CPU. The target is embedded control logic — attitude control, sensor processing, communication protocol state machines — where CMOS alternatives fail under the radiation constraints of specific missions. This is a fundamentally different application claim.
Post-2015 research funding and academic attention shifted heavily toward quantum computing and neuromorphic architectures. NML's academic home shrank.
POLARIS Position: This creates an opportunity: the specific intersection of NML and space hardware is almost entirely unaddressed in the current literature. POLARIS enters a less crowded space.
POLARIS does not claim NML will replace rad-hard CMOS as the general solution for space computing. It claims NML is the superior solution for a specific, underaddressed class of problems: embedded non-volatile control logic in missions where the radiation environment, power budget, and temperature range simultaneously exceed the design envelope of conventional rad-hard approaches.
POLARIS is structured in four phases. Each phase has defined deliverables that gate progression to the next. The programme begins at characterisation through simulation and progresses toward fabrication and eventual demonstration only when the simulation evidence justifies it.
NML Gate Characterisation Library v1.0: noise margins, thermal stability, propagation data for Permalloy, Cobalt, CoFeB majority gates across geometry and temperature ranges.
Simulation-validated circuit library: wire, NOT, majority gate, 1-bit half adder, 4-bit shift register under space-relevant conditions.
Experimentally verified gate: switching field and noise margin matching simulation within ±15%.
A functional NML circuit performing a defined control logic task, with documented radiation immunity and power-cycle state retention.
Phase 1 constitutes the current active work of POLARIS. Its purpose is to produce a systematically characterised dataset of NML gate behaviour — the engineering data that every subsequent phase will reference for material selection, geometry choice, and circuit design decisions.
Parameter sweep across aspect ratio (1.5–4.0), width (80–120nm), and thickness (10–20nm) for Permalloy. Measure: coercive field, switching field, anisotropy energy barrier ΔE/kT at 300K, and domain wall type. Output: a design map identifying the geometry region simultaneously satisfying ΔE/kT > 40 (thermal stability) and H_sw < 25mT (practical clock range).
For three selected geometries × three materials (Permalloy, Cobalt, CoFeB) × eight temperatures (4K, 77K, 150K, 200K, 250K, 300K, 350K, 400K): spontaneous switching rate, clock field requirement, and energy barrier. Establishes material selection data for missions at Europa, lunar poles, and room-temperature environments.
Full truth table verification (all 8 input combinations) for the 3-input majority gate. Noise margin sweep: transverse bias field H_bias from 0 to 30mT in 0.5mT steps at 0K and 300K, for inter-magnet spacings of 15–30nm and all three materials. The noise margin — maximum tolerable stray field before gate failure — is the single most important figure of merit for circuit density planning.
Reliable propagation length as a function of chain length (5–50 magnets), inter-magnet spacing, temperature, and material. Fanout study: whether one source magnet can drive two output magnets simultaneously at angular separations of 45°, 90°, and 120°. These data set the wiring rules for any circuit designed from this gate library.
20-magnet wire divided into four 5-magnet zones with staggered clock phases (0°, 90°, 180°, 270°). Parameter sweep over clock field amplitude (0.6–1.2 × H_sw), frequency (0.1–2GHz), and rise time (10–30% of period). Output: maximum reliable clock frequency and optimal clock waveform parameters — the design specification for the POLARIS clock circuit.
Repeat Studies 3–5 for all three candidate materials. Additionally: apply constant background DC field of 50μT (representative of Earth's geomagnetic field in LEO) and verify gate function. This study produces the comparative dataset that determines material selection for Phase 3 fabrication.
Initialise a gate or wire circuit to a defined state. Remove all external fields. Run for 100ns at 300K. Verify state unchanged. This is the formal simulation demonstration of the non-volatile property that makes NML uniquely valuable for space applications. At 77K and 4K, extend the test to 1μs and 10μs respectively.
Using Cowburn's original geometry — 55nm circular Permalloy nanodots — reproduce the signal propagation result from the landmark Science paper. Anti-ferromagnetic ground state in a chain of circular dots coupled only by dipolar interaction. Closing the loop between the foundational experimental paper and POLARIS simulation validates parameter choices and confirms the simulation environment reproduces known physics.
All critical results from MuMax3 are cross-validated using OOMMF (NIST), a CPU-based solver using a different numerical integrator. Results that agree within 5% across both solvers are classed as high-confidence. Results that diverge require investigation of grid resolution, cell size, and boundary condition differences before being used as design inputs. The NIST Standard Problem 4 benchmark is run on both solvers as a baseline calibration step.
The primary output of Phase 1 is the VELSTROM NML Gate Characterisation Library (NGLD v1.0) — a structured dataset published under CC BY 4.0 on the VELSTROM Platform. Every gate simulation result is recorded with:
| Field | Description |
|---|---|
| gate_type | wire / NOT / majority_3 / AND / OR / half_adder |
| material | permalloy / cobalt / coFeb |
| geometry | width_nm, length_nm, thickness_nm, spacing_nm (Nanomagnet dimensions and inter-magnet gap) |
| switching_field_mT | Deterministic switching field at 0K |
| noise_margin_mT | Maximum tolerable transverse field at 300K |
| thermal_stability_kT | ΔE/kT at 300K |
| spontaneous_error_rate | Switching events per clock cycle at 300K (Monte Carlo) |
| max_clock_frequency_GHz | Maximum reliable operating frequency |
| temperature (K) | Operating temperature of the characterisation run |
| dc_background_field_uT | Applied background DC field (0 or 50μT LEO representative) |
| power_cycle_retention | Boolean: state retained through 100ns zero-field run at temperature |
| mumax3_script_sha256 | Hash of simulation script for full reproducibility |
| simulation_tool | mumax3_v3.10 / oommf_1.2a6 |
This dataset will be the first systematic NML gate characterisation dataset with explicit space-application parameters (temperature range, background DC field, power-cycle retention) in the published literature. It is publishable as a data paper in a journal such as Scientific Data (Nature Portfolio) and serves as the foundation for all Phase 2 and 3 work.
Open-source, GPU-accelerated micromagnetics solver developed at Ghent University (Belgium) and maintained as an active research tool. Integrates the LLG equation over a 3D finite-difference grid using a 4th-order Runge-Kutta integrator, with GPU parallelism provided by CUDA.
Object-Oriented MicroMagnetic Framework developed and maintained by the National Institute of Standards and Technology (NIST), United States. CPU-based solver providing the community standard for micromagnetics benchmarking.
Used for all primary visualisation of simulation output: hysteresis loops from tablesave output, magnetisation dynamics (mx/my/mz vs time), noise margin curves, thermal switching histograms, and domain pattern maps. Scripts archived with SHA-256 hash.
numpy, scipy, pandas, matplotlib, ovf, numba, sympy, scikit-learn. All simulation post-processing, dataset construction, and visualisation beyond GnuPlot uses Python, available via the VELSTROM Platform conda environment.
| Resource | Specification | Role |
|---|---|---|
| Primary laptop | Personal GPU — NVIDIA [model], [VRAM]GB VRAM | Development, L1–L2 problems, script debugging |
| University Computational Physics Lab | High-performance GPU workstations (confirmed access) | Parameter sweep campaigns (Studies 1–6), L3–L5 problems, large-grid simulations requiring VRAM exceeding laptop capacity |
| VELSTROM Platform (future) | GPU cluster (to be provisioned) | Phase 2 simulation campaigns; community MuMax3 access via platform.velstrom.in |
POLARIS does not target a general-purpose NML processor. A complete NML CPU — capable of running arbitrary software, executing complex instruction sets, or performing neural network inference at competitive speeds — is not a realistic near-term research objective, and claiming otherwise would misrepresent the state of the field. NML gates are intrinsically slow relative to CMOS (clocking at MHz rather than GHz in demonstrated implementations), and circuit density is constrained by fabrication precision requirements. For general-purpose computing, CMOS — even rad-hard CMOS — remains the correct answer.
The target is embedded non-volatile control logic — small, defined-function circuits that:
For tasks of this kind, NML's intrinsic properties are not compensatory — they are precisely what is required. The computing task is simple enough that NML's speed limitation is not a constraint. The environment is harsh enough that CMOS's fundamental vulnerability to SEUs is a real failure risk. The power budget is tight enough that TMR overhead matters. This is where the advantage is real.
A spacecraft attitude control system (ACS) for a small deep space probe requires logic that monitors sensor inputs (sun sensor, star tracker), computes the difference from the desired orientation, and outputs reaction wheel or thruster commands. The state machine for this task requires on the order of 100–1,000 logic gates, operating at update rates of 1–100 Hz. This is well within NML's achievable operating speed in demonstrated implementations.
For a probe in Jupiter's radiation belts, a conventional SRAM-based ACS microcontroller experiences SEUs frequently enough to require constant ECC scrubbing and periodic resets. Each reset risks losing in-progress computation. An NML ACS state machine: experiences no SEUs (orthogonality), retains state through power interruptions (non-volatile), operates across the thermal range (Curie temperature far above operating range), and requires no TMR overhead (no charge-based state to protect).
If Phase 1 and Phase 2 simulation evidence supports the application claim, and Phase 3 fabrication confirms simulation-to-experiment agreement, the long-term POLARIS vision is:
| Milestone | Description | Approximate Horizon |
|---|---|---|
| NML Gate Library v1.0 | Published characterisation dataset; foundation for all further work | Phase 1 |
| NML Circuit Library v1.0 | Simulation-validated circuit cells: wire, NOT, MAJ, adder, shift register | Phase 2 |
| First fabricated NML majority gate | Experimentally measured gate matching simulation within tolerance | Phase 3 |
| POLARIS-0 Prototype | A functional NML embedded control circuit performing a defined logic task, with documented power-cycle state retention and radiation immunity test data | Phase 4 |
| POLARIS Flight Candidate | Radiation-tested NML circuit cleared for consideration as a flight heritage component in a nanosatellite or CubeSat mission | Long-horizon |
Each milestone is gated by the evidence from the preceding phase. VELSTROM will not advance claims beyond what the evidence supports.
| Mission Class | Radiation Challenge | Power Challenge | Temperature Challenge |
|---|---|---|---|
| Europa Clipper / Jupiter orbiters | Extreme — Jupiter's magnetosphere is the harshest in the solar system, delivering >2 Mrad over mission life | Solar power severely limited at 5 AU; RTG power constrained | Thermal environment cycles from sunlit to shadow with eclipse durations of hours |
| Lunar polar operations | GCR and SEP exposure without Earth's magnetosphere | No solar power during 14-day lunar night; battery or RTG only | −173°C to +127°C surface thermal range; night temperatures at polar craters < −200°C |
| Deep space CubeSats (beyond Mars) | Full GCR and SEP flux, no magnetospheric protection | Severe — small solar panels at >1.5 AU | Cryogenic at outer solar system distances |
| Embedded sensor nodes in high-radiation terrestrial environments | Nuclear reactor monitoring, particle accelerator instrumentation | Battery/energy harvesting only | Elevated temperature near reactors |
VELSTROM's identity is Earth Engineering — the application of technology, data, and physical science to planetary-scale systems. POLARIS addresses the hardware layer that enables reliable observation and intervention in planetary systems from above.
The connection is not metaphorical. Remote sensing and earth observation systems depend on satellite data. Those satellites carry computing systems that constrain what can be processed onboard, how autonomously they can operate, and how reliably they function in the radiation environment of low Earth orbit. Better onboard computing — lighter, more reliable, more power-efficient — directly improves the quality and availability of earth observation data. POLARIS is building toward that hardware layer.
POLARIS's simulation infrastructure — MuMax3 problem library, OOMMF validation suite, Python numerical tools, and the NML Gate Library dataset — is hosted and made accessible on platform.velstrom.in under the Scientific Computing section. This serves two purposes: it makes POLARIS research reproducible and citable, and it opens the simulation infrastructure to other researchers working in spintronics, magnetic materials, and space hardware, building a research community around VELSTROM's platform.
POLARIS positions VELSTROM at the intersection of three research communities that currently do not interact significantly: the NML/spintronics community, the space hardware community, and the satellite earth observation community. No other research group — academic or industrial — is currently working explicitly at this intersection. This is both the opportunity and the challenge.
The opportunity: the application claim POLARIS makes (NML for specific space embedded logic) is genuinely underaddressed in the literature. A well-executed Phase 1 simulation campaign, published as a data paper with a companion characterisation paper, establishes VELSTROM in a research niche with no current occupant.
The challenge:building credibility in each of those three communities simultaneously requires producing work that each community recognises as rigorous by its own standards. The simulation campaign must meet the micromagnetics community's standards (NIST benchmark compliance, spatial cross-validation, OOMMF agreement). The application framing must meet the space hardware community's standards (specific mission context, quantified radiation environment, realistic circuit requirements). The earth observation connection must be substantiated, not merely asserted.
The following literature forms the primary reference base for POLARIS Phase 1. Full bibliography available on request.
| Reference | Journal | Relevance to POLARIS |
|---|---|---|
| Cowburn, R.P. & Welland, M.E. (2000) | Science, 287(5457) | Foundational demonstration of NML room-temperature operation. Establishes dipolar coupling as the information carrier. Simulation reproduction target (Study 8). |
| Imre, A. et al. (2006) | Science, 311(5758) | First experimental NML majority gate demonstration. Establishes gate geometry and coupling principles. Primary benchmark for Study 3. |
| Alam, M.T. et al. (2010–2015) | IEEE Transactions on Nanotechnology | Series of papers on NML simulation and circuit design (Notre Dame group). Methodological reference for noise margin characterisation and circuit simulation at Phase 1 level. |
| Bhanja, S. & Sarkar, S. (2006) | IEEE Transactions on Nanotechnology, 5(2) | Probabilistic modeling of NML. Stochastic analysis of thermal switching in NML. Foundation for Study 2 thermal stability methodology. |
| Donahue, M.J. & McMichael, R.D. (1997) | Physica B, 233(4) | Exchange energy formulations for 3D micromagnetics. OOMMF exchange energy conventions; essential for MuMax3/OOMMF cross-validation setup. |
| Manipatruni, S., Nikonov, D.E. & Young, I.A. (2018) | Nature Physics, 14 | Beyond CMOS computing with spin and polarization. Post-2015 context: where spin-based computing fits in the beyond-CMOS landscape. Essential reading for POLARIS application framing. |
| Biswas, A.K. et al. (2017) | IEEE Magnetics Letters, 8 | Strain-mediated multiferroic NML. Post-2015 development: strain-clocked NML addressing the clock power distribution problem. |
| Vansteenkiste, A. et al. (2014) | AIP Advances, 4(10) | The design and verification of MuMax3. MuMax3 solver reference paper. Required citation for all POLARIS simulation publications. |
If you work in NML, spintronics, micromagnetics, or space hardware and are interested in collaboration or simulation access, contact our research team.
For spacecraft designers, mission architects, and radiation-effects engineers interested in NML as an alternative to conventional rad-hard approaches.
For deep-tech investors with long-horizon appetites, programme documentation and research briefings are available under mutual NDA.
This document describes VELSTROM's research vision and planned programme. It does not constitute a guarantee of outcomes, timelines, or commercial results.